Security of Block Ciphers

Kazuo Sakiyama , Yu Sasaki , Yang Li 지음

Wiley 2015년 07월 14일 출간

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A comprehensive evaluation of information security analysis spanning the intersection of cryptanalysis and side-channel analysis•Written by authors known within the academic cryptography community, this book presents the latest developments in current research•Unique in its combination of both algorithmic-level design and hardware-level implementation; this all-round approach - algorithm to implementation &n- covers security from start to completion•Deals with AES (Advanced Encryption standard), one of the most used symmetric-key ciphers, which helps the reader to learn the fundamental theory of cryptanalysis and practical applications of side-channel analysis

목차

Preface xi About the Authors xiii 1 Introduction to Block Ciphers 1 1.1 Block Cipher in Cryptology 1 1.1.1 Introduction 1 1.1.2 Symmetric-Key Ciphers 1 1.1.3 Efficient Block Cipher Design 2 1.2 Boolean Function and Galois Field 3 1.2.1 INV, OR, AND, and XOR Operators 3 1.2.2 Galois Field 3 1.2.3 Extended Binary Field and Representation of Elements 4 1.3 Linear and Nonlinear Functions in Boolean Algebra 7 1.3.1 Linear Functions 7 1.3.2 Nonlinear Functions 7 1.4 Linear and Nonlinear Functions in Block Cipher 8 1.4.1 Nonlinear Layer 8 1.4.2 Linear Layer 11 1.4.3 Substitution-Permutation Network (SPN) 12 1.5 Advanced Encryption Standard (AES) 12 1.5.1 Specification of AES-128 Encryption 12 1.5.2 AES-128 Decryption 19 1.5.3 Specification of AES-192 and AES-256 20 1.5.4 Notations to Describe AES-128 23 Further Reading 25 2 Introduction to Digital Circuits 27 2.1 Basics of Modern Digital Circuits 27 2.1.1 Digital Circuit Design Method 27 2.1.2 Synchronous-Style Design Flow 27 2.1.3 Hierarchy in Digital Circuit Design 29 2.2 Classification of Signals in Digital Circuits 29 2.2.1 Clock Signal 29 2.2.2 Reset Signal 30 2.2.3 Data Signal 31 2.3 Basics of Digital Logics and Functional Modules 31 2.3.1 Combinatorial Logics 31 2.3.2 Sequential Logics 32 2.3.3 Controller and Datapath Modules 36 2.4 Memory Modules 40 2.4.1 Single-Port SRAM 40 2.4.2 Register File 41 2.5 Signal Delay and Timing Analysis 42 2.5.1 Signal Delay 42 2.5.2 Static Timing Analysis and Dynamic Timing Analysis 45 2.6 Cost and Performance of Digital Circuits 47 2.6.1 Area Cost 47 2.6.2 Latency and Throughput 47 Further Reading 48 3 Hardware Implementations for Block Cip

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저자(글) Kazuo Sakiyama

저자(글) Yu Sasaki

저자(글) Yang Li